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5-V Low Drop Voltage Regulator
TLE 4290
Features * * * * * * * * * * Output voltage 5 V 2% Very low current consumption 450 mA current capability Power Good Feature Very low-drop voltage Short-circuit-proof Reverse polarity proof Suitable for use in automotive electronics Green Product (RoHS compliant) AEC Qualified
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P-TO252-5-11
Functional Description The TLE 4290 is a monolithic integrated low drop voltage regulator which can supply loads up to 450 mA with power good feature. An input voltage up to 42 V is P-TO263-5-1 regulated to VQ,nom = 5.0 V. The device is designed to supply -controllers in the severe environment of automotive applications. Therefore it is protected against overload, short circuit and over temperature conditions. Of course the TLE 4290 can been used also in all other applications, where a stabilized 5 V voltage is required.
Type TLE 4290 D TLE 4290 G
Package PG-TO252-5-11 PG-TO263-5-1
Data Sheet
1
Rev. 1.7, 2007-03-20
TLE 4290
Power Good The Power Good PG pin informs e.g. the microcontroller in case the output voltage has fallen below the lower threshold VQ,pgt-d of typ. 3.65 V. Connecting the regulator to a battery voltage at first the power good signal remains LOW. When the output voltage has reached the higher threshold VQ,pgt-i the power good output remains still LOW for the power good delay time trd. Afterwards the power good output turns HIGH. The delay time can be set by the user with an external capacitor at pin D according to the requirements of the application. The Power Good circuitry supervises the output voltage. In case VQ falls below the lower Power Good switching threshold VQ,pgt-d the PG output is set LOW after the Power Good reaction time. The Power Good LOW signal is generated down to an output voltage VQ to 1 V. A LOW signal at the Power Good pin informs that the battery was lost and memory is no longer valid. The feature should be used in combination with a microcontroller with internal reset.
TLE 4290
I
1
5
Q
BandGapReference
Current and Saturation Control
2 Power Good Control
PG
4 GND D
AEB02823
Figure 1
Block Diagram
Data Sheet
2
Rev. 1.7, 2007-03-20
TLE 4290
PG-TO263-5-1 PG-TO252-5-11
GND
I PG
DQ
AEP02825
I
PG GND D
Q
AEP02827
Figure 2 Table 1 Pin No. 1 2 3 4 5 I
Pin Configuration (top view) Pin Definitions and Functions Symbol PG GND D Q Function Input; block to ground directly at the IC with a ceramic capacitor. Power Good; open collector output. Add a pull-up resistor of > 5 k to pin Q. Ground; Pin 3 internally connected to heatsink. Delay; connect a capacitor to GND for setting power good delay time. Output; block to ground with a capacitor, C 22 F ESR < 5 at 10 kHz.
Data Sheet
3
Rev. 1.7, 2007-03-20
TLE 4290
Table 2 Parameter Input I Voltage Current Output Q Voltage Current
Absolute Maximum Ratings Symbol Limit Values Min. Max. 45 - 16 - 25 5 7 2 150 150 V - V - V mA V mA C C - Internally limited - Internally limited - - - - - - Unit Test Condition
VI II VQ IQ VPG IPG VD ID Tj Tstg
-42 - -1.0 - -0.3 -5 -0.3 -2 -40 -50
Power Good Output PG Voltage Current Delay D Voltage Current Temperature Junction temperature Storage temperature
Note: Stresses above those listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Data Sheet
4
Rev. 1.7, 2007-03-20
TLE 4290
Table 3 Parameter Input voltage
Operating Range Symbol Limit Values Min. Max. 42 150 4 53 78 V C K/W K/W K/W - - - TO2631) TO2521) 5.5 -40 - - - Unit Remarks
Junction temperature Thermal Resistance Junction case Junction ambient Junction ambient
VI Tj Rthj-c Rthj-a Rthj-a
1) Worst case, regarding peak temperature; zero airflow; mounted on a PCB FR4, 80 x 80 x 1.5 mm3, heat sink area 300 mm2
Note: In the operating range, the functions given in the circuit description are fulfilled.
Data Sheet
5
Rev. 1.7, 2007-03-20
TLE 4290
Table 4
Characteristics
VI = 13.5 V; -40 C < Tj < 150 C (unless otherwise specified)
Parameter Output Output voltage Output voltage Output current limitation Current consumption; Iq = II - IQ Current consumption; Iq = II - IQ Current consumption; Iq = II - IQ Current consumption; Symbol Limit Values Min. Typ. Max. 5.0 5.0 700 200 200 5 12 250 15 5 60 0.5 - 5.1 5.1 - 230 255 12 25 500 30 15 - - - V V mA A A mA mA mV mV mV dB Unit Measuring Condition
VQ VQ IQ Iq Iq Iq Iq Vdr
VQ,lo VQ,li
4.9 4.9 450 - - - - - -30 -15 - - 22
5 mA < IQ < 400 mA; 6 V < VI < 28 V 5 mA < IQ < 200 mA; 6 V < VI < 40 V
1)
IQ = 1 mA; Tj = 25 C IQ = 1 mA; Tj 85 C IQ = 250 mA IQ = 400 mA IQ = 300 mA Vdr = VI - VQ1) VI = 6 V; IQ = 5 mA to 400 mA Vl = 8 V to 32 V; IQ = 5 mA fr = 100 Hz; Vr = 0.5 Vpp
Iq = II - IQ
Drop voltage Load regulation Line regulation Power supply ripple rejection Temperature output voltage drift Output Capacitor
PSRR
dVQ/dT
mV/K - F ESR < 5 in the operation range
CQ
Power Good Output PG and Delay Timing D Power Good switching threshold Power Good switching threshold
VQ,pgt-i VQ,pgt-d
4.45 3.50
4.65 3.65
4.80 3.80
V V
VQ increasing VQ decreasing
Data Sheet
6
Rev. 1.7, 2007-03-20
TLE 4290
Table 4
Characteristics (cont'd)
VI = 13.5 V; -40 C < Tj < 150 C (unless otherwise specified)
Parameter Power Good output low voltage Power Good output leakage current Power Good charging current Upper timing threshold Symbol Limit Values Min. Typ. Max. 0.2 0 6 1.8 0.85 16 0.5 0.4 2 9 2.2 1.10 22 2.0 V A A V V ms s - - 3 1.5 0.60 10 0.2 Unit Measuring Condition
VPGL IPGH ID,c
RPG 5 k; VQ > 1 V VPG > 4.5 V VD = 1 V
- -
VDU Lower timing threshold VDL trd Power Good delay time Power Good reaction time trr
CD = 47 nF CD = 47 nF
1) Measured when the output voltage VQ has dropped 100 mV from the nominal value obtained at VI = 13.5 V.
Note: The listed characteristics are ensured over the operating range of the integrated circuit. Typical characteristics specify mean values expected over the production spread. If not otherwise specified, typical characteristics apply at Ta = 25 C and the given supply voltage.
II VI CI1
1000 F
I CI2
100 nF
1
5
Q
IQ CQ
22 F
RPG
TLE 4290 5k
ID ID,C
VQ
D 4 GND 2 PG
CD
47 nF
VPG
IGND
AES02824
Figure 3
Test Circuit
Data Sheet
7
Rev. 1.7, 2007-03-20
TLE 4290
Application Information
CQ1 CQ2
5Q 22 F 100 nF
TLE 4290
-Controller
VBAT CI1
I1 CI2
BandGapReference Current and Saturation Control
VCC
RPG
5k
Internal Reset
2 Power Good Control PG
NMI / PORT
4 GND D
CD
47 nF
AES02822
Figure 4 Input, Output
Application Diagram
An input capacitor is necessary for damping line influences. A resistor of approx. 1 in series with CI, can damp the LC of the input inductivity and the input capacitor. The TLE 4290 requires an output capacitor of at least 22 F with an ESR below 5 for stability. Power Good The Power Good pin informs e.g. the micro-controller in case the output voltage has fallen below a threshold of typ. 3.65 V. When the battery voltage is supplied the Power Good signal indicates a loss of memory due to missing power. After the Memory Good switching threshold is reached the Power Good output remains low for the Power Good delay time. This time can be set by the user with an external capacitor at pin D according to the requirements of the application, e.g. the time until the microcontroller is initialized and ready to receive any information.
Data Sheet 8 Rev. 1.7, 2007-03-20
TLE 4290
The power good circuit supervises the output voltage. In case VQ falls below the Power Good switching threshold the Power Good output PG is set LOW after the power good reaction time. The power good LOW signal is generated down to an output voltage VQ to 1 V. A LOW signal at the power good pin informs that the battery was lost and memory is no longer valid. The feature should only be used in combination to a microcontroller with internal reset. For the power good delay time after the output voltage of the regulator is above the reset threshold, the reset signal is set High again. The reset delay time is defined by the reset delay capacitor CD at pin D. The Power Good delay time is defined by the charging time of an external delay capacitor CD.
CD = (trd x ID,c) / V
With: * * * *
(1)
CD = Power Good delay capacitor trd = Power Good delay time V = VDU, typical 1.8 V ID,c = Charge current typical 6 A
V
VQ
< t rr V Q,pgt_i V Q,pgt_d d V D, c = dt CD VDU V DL t rd t rr
VD
V PG
Power-on Power Good Signal
Thermal Shutdown
Voltage Dip at Input
Undervoltage
Secondary Spike
Overload at Output
AED03074
Figure 5
Data Sheet
Power Good Timing
9 Rev. 1.7, 2007-03-20
TLE 4290
The power good reaction time trr is the time it takes the voltage regulator to set power good output PG LOW after the output voltage has dropped below the power good switching threshold. It is typically 0.5 s for delay capacitor of 47 nF. For other values for CD the reaction time can be estimated using the following equation:
trr = 10 ns/nF x CD
(2)
The Power Good output is an open collector output. It requires externally a pull-up resistor of at least 5 k to Q.
Data Sheet
10
Rev. 1.7, 2007-03-20
TLE 4290
Typical Performance Characteristics Output Voltage VQ versus Temperature Tj
5.2 V 5.1
AED03033
Output Voltage VQ versus Input Voltage VI
12 VQ V 10
AED01929
VQ
VI = 13.5 V
5.0
8
4.9
6
R L = 25
4.8
4
4.7
2
4.6 -40
0
40
80
120 C 160
0
0
2
4
6
Tj
8 V 10 V
Data Sheet
11
Rev. 1.7, 2007-03-20
TLE 4290
Output Current IQ versus Temperature Tj
1200 mA 1000
AED03034
Output Current IQ versus Input Voltage VI
1.2
AED03046
IQ
IQ
A 1.0
800
0.8
600
0.6
400
0.4
T j = 125 C
25 C
200
0.2
0 -40
0
40
80
120 C 160
0
0
10
20
30
40 V 50
Tj
VI
Current Consumption Iq versus Output Current IQ; Tj = 25 C
2.4
AED03112
Current Consumption Iq versus Output Current IQ
q
80 mA 70 60
AED03035
q mA
2.0
1.6
50
1.2 V = 13.5 V 0.8
40 30 V = 13.5 V 20
0.4
10
0
0
20
40
60
80
mA 120
0
0
100
200
300
400
mA 600
Q
Q
Data Sheet
12
Rev. 1.7, 2007-03-20
TLE 4290
Drop Voltage Vdr versus Output Current IQ
800 mV 700 600 500 400 300 200 100 0 mA
AED01935
Charge Current ID,c versus Temperature Tj
8 A ID, c 7 6 5 4 3 2 1 0 -40
AED03036
Vdr
T j = 125 C
25 C
VI = 13.5 V VD = 1 V
0
200
400
600
1000
0
40
80
120 C 160
IQ
Tj
Upper Timing Threshold VDU versus Temperature Tj
V DU 4.0 mA 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 -40
AED03037
V = 13.5 V
0
40
80
120 C 160 Tj
Data Sheet
13
Rev. 1.7, 2007-03-20
TLE 4290
Package Outlines
6.5 +0.15 -0.05 5.7 MAX.
(4.24) 1 0.1
1)
A B
0.8 0.15
2.3 +0.05 -0.10 0.5 +0.08 -0.04
(5)
9.98 0.5 6.22 -0.2
0.9 +0.20 -0.01 0...0.15
0.51 MIN.
0.15 MAX. per side
5 x 0.6 0.1 1.14
0.5 +0.08 -0.04 0.1 B
4.56
0.25 M A B
1) Includes mold flashes on each side. All metal surfaces tin plated, except area of cut.
GPT09527
Figure 6
PG-TO252-5-11 (Plastic Transistor Single Outline)
Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
You can find all of our packages, sorts of packing and others in our Infineon Internet Page "Products": http://www.infineon.com/products. SMD = Surface Mounted Device Data Sheet 14 Dimensions in mm Rev. 1.7, 2007-03-20
TLE 4290
4.4 10 0.2 0...0.3 8.5 1) A 1.27 0.1 B 0.05
10.3
(15)
9.25 0.2
7.55 1)
2.4 0.1
0...0.15 5 x 0.8 0.1 4 x 1.7 0.25
M
4.7 0.5
2.7 0.3
0.5 0.1
AB
8 MAX.
0.1 B
1) Typical Metal surface min. X = 7.25, Y = 6.9 All metal surfaces tin plated, except area of cut.
GPT09113
GPT09113
Figure 7
PG-TO263-5-1 (Plastic Transistor Single Outline)
Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
You can find all of our packages, sorts of packing and others in our Infineon Internet Page "Products": http://www.infineon.com/products. SMD = Surface Mounted Device Data Sheet 15 Dimensions in mm Rev. 1.7, 2007-03-20
TLE 4290
Revision History
Version Rev. 1.7
Date
Changes
2007-03-20 Initial version of RoHS-compliant derivate of TLE 4290 Page 1: AEC certified statement added Page 1 and Page 14: RoHS compliance statement and Green product feature added Page 1 and Page 14: Package changed to RoHS compliant version Legal Disclaimer updated
Data Sheet
16
Rev. 1.7, 2007-03-20
Edition 2007-03-20 Published by Infineon Technologies AG 81726 Munich, Germany
(c) 2007 Infineon Technologies AG
All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

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